Midir – Resilient Systems on a Chip
A hardware architectural concept and implementation for incrementally improving resilience against accidental faults and attacks
Technology Overview
Midir is a hardware architectural concept and implementation for incrementally improving the resilience of tiled multicore, manycore or similar systems on a chip against accidental faults and attacks. Midir mechanisms integrate at the tile to network-on-chip interface, promote tiles to fault-containment domains and enables various forms of protection up to automatic and unattended fault and intrusion tolerance through replication, which eliminates single-point of failure syndromes at all software layers, including at the lowest system and firmware level.
Midir is demonstrated in an FPGA-based research prototype, emulating a multicore system and showing the essentials of a fault and intrusion tolerant hypervisor.
Benefits
Improved SoC-level resilience, from classical isolated execution to the possibility to eliminate any software single point of failures.
Applications
Critical infrastructures, cloud, safety-critical systems
Opportunity
Seeking:
- Direct licensing of technology and prototype to a company,
- Further joint development of technology together with company, e.g., through a partnership project
Patents
- IP protected through patents
- Complementary work on authenticated boot/late launch of replicated system (open for inquiries)
IP Status
- Patented
Seeking
- Development partner
- Licensing